By H. Casier, et al.,
Analog Circuit layout is predicated at the every year Advances in Analog Circuit layout workshop. the purpose of the workshop is to compile designers of complicated analogue and RF circuits for the aim of learning and discussing new probabilities and destiny advancements during this box. chosen themes for AACD 2007 are: (1) Sensors, Actuators and gear Drivers for the automobile and commercial setting (Tue 27 March) - Chaired via Herman Casier, AMI Semiconductor Fellow, Belgium (2) built-in PAs from Wireline to RF (Wed 28 March) - Chaired by way of Prof. Michiel Steyaert, Catholic college, Leuven (3) Very excessive Frequency entrance Ends (Thu 29 March) - Chaired by means of Prof. Arthur van Roermund, Eindhoven college of Technology.
Part I: Sensors, Actuators and gear Drivers for the Automotive
and commercial setting 1
Heterogeneous Integration of Passive elements for the Realization
of RF-System-in-Packages 3
Eric Beyne, Walter De Raedt, Geert Carchon, and Philippe Soussan
The Eye-RIS CMOS imaginative and prescient method 15
Ángel Rodríguez-Vázquez, Rafael Domínguez-Castro,
Francisco Jiménez-Garrido, Sergio Morillas, Juan Listán,
Luis Alba, Cayetana Utrera, Servando Espejo and Rafael Romay
An Inductive place Sensor ASIC 33
Petr Kamenicky, Pavel Horsky
CMOS Single-Chip digital Compass with Microcontroller 55
Christian Schott, Robert Racz, Samuel Huber, Angelo Manco,
Markus Gloor, Nicolas Simonne
Protection and analysis of shrewdpermanent energy High-Side Switches
in car purposes 71
Integrated CMOS energy Amplifiers for hugely Linear
Broadband verbal exchange 93
K. Mertens, M. Unterweissacher, M. Tiebout, C. Sandner
Power Combining strategies for RF and mm-Wave
CMOS energy Amplifiers 115
Patrick Reynaert, M. Bohsali, D. Chowdhury and A. M. Niknejad
Switched RF Transmitters 145
Willem Laflere, Michiel Steyaert and Jan Craninckx
High-Speed Serial stressed out Interface for cellular purposes 163
Gerrit W. den Besten
High Voltage xDSL Line Drivers in Nanometer applied sciences 179
Bert Serneels, Michiel Steyaert, Wim Dehaene
VoIP SLIC Open Platform: The Wideband Subscriber Line Interface
Luc D’Haeze, Jan Sevenhans, Herman Casier, Damien Macq,
Stefan van Roeyen, Stef Servaes, Geert De Pril, Koen Geirnaert,
Part III: Very excessive Frequency entrance Ends 235
Systems and Architectures for extraordinarily excessive Frequency Radio hyperlinks 237
Peter Baltus, Peter Smulders, Yikun Yu
Key development Blocks for Millimeter-Wave IC Design
in Baseline CMOS 259
Mihai A.T. Sanduleanu, Eduardo Alarcon, Hammad M. Cheema,
Maja Vidojkovic, Reza Mahmoudi and Arthur van Roermund
Analog/RF layout suggestions for High-Power Silicon
Based mmWave and THz purposes 283
Ullrich R. Pfeiffer
SiGe BiCMOS and CMOS Transceiver Blocks for Automotive
Radar and Imaging purposes within the 80-160 GHz variety 303
S.P. Voinigescu, S. Nicolson, E. Laskin, okay. Tang and P. Chevalier
A comparability of CMOS and BiCMOS mm-Wave Receiver
Circuits for functions at 60GHz and past 327
Sharon Malevsky and John R. Long
Integrated Frontends for Millimeterwave Applications
Using III-V applied sciences 343
Herbert Zirath, Sten E. Gunnarsson, Camilla Kärnfelt, Toru Masuda,
Mattias Ferndahl, Rumen Kozhuharov, Arne Alping
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Extra info for Analog circuit design 2007 : sensors, actuators and power drivers ; integrated power amplifiers from wireline to RF ; very high frequency front ends
Node NBulk is floating and only capacitive discharging current flows through diode D1. In summary, in case of missing supply, the input voltage will be allowed to drop below ground by more than 1 VTh without creating a conductive path. PBulk R2 PGate MP13 MP12 Vdd MN12b Vdd MN13b Vdd Power Down N MN12a MP1 MN13a MP5 D3 D3 IN A Vdd D5 Vdd MN1 MP2a OUT D6 MN5 Vdd A MP3a MN2 MP2b MP3b NGate Power Down MN3 R1 NBulk Fig. 10 Both positive and negative DC shift tolerant pass-gate Out of the scope of the application, the described principle can be equally applied to a positive DC shift tolerant pass-gate (complementary structure to the negative DC shift tolerant pass-gate).
In practice the impact of this can be largely attenuated by using microlenses on top of the chip, since most of the light received by a pixel is focused onto its active sensing area. On the other hand, since the total silicon area is constrained due to reliability considerations, the spatial resolution is constrained as well. However, limited spatial resolution may not be a problem if the system is intended for high-level tasks such as segmentation, object detection, etc. This is illustrated in Figure 6.
LPF Gain stage 1 AGC FSM Gain stage 2 Gain stage 3 AGC FSM AGC FSM Fig. 6 AGC- gain control stage 38 P. Kamenicky and P. Horsky Single ended input signal processing typically limits the resolution to 10 bits or 60dB Signal to Noise Ratio (SNR) due to the noise penetrating into the analog circuitry from the digital. This system is based on differential signal processing and achieves a resolution >12 bits. The presence of a high amplitude common mode signal on the input results in the requirement for a high Common Mode Rejection Ratio (CMRR).
Analog circuit design 2007 : sensors, actuators and power drivers ; integrated power amplifiers from wireline to RF ; very high frequency front ends by H. Casier, et al.,