Alt R., Vignes J.'s 10th GAMM-IMACS International Symposium on Scientific PDF

By Alt R., Vignes J.

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Extra resources for 10th GAMM-IMACS International Symposium on Scientific Computing, Computer Arithmetic, and Validated Numerics

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Section 4 deals with those issues and presents the way they are resolved. Finally in Section 5 two case studies are presented that evaluate the actual speed-up gained by the application of the proposed architecture. Conclusion and Future Work follow in Section 6. 2 Definitions-Notation A perfectly nested loop has the general representation illustrated in Listing 1. for (i1=0;i1

Exact times can be calculated by using the clock period which is allowed by the technology used for the implementation of the system’s combinatorial circuits. 28 I. Panagopoulos et al. blue=min(max(blue,0),255) } Listing 5. An image filtering algorithm tu Speed-up 12 5,00E+08 10 4,00E+08 8 3,00E+08 6 2,00E+08 4 1,00E+08 2 PEs 0,00E+00 1 2 3 4 5 6 7 8 9 PEs 10 11 0 1 2 3 4 5 6 7 8 9 10 11 Fig. 5. 2 Combinatorial Optimization in Hardware/Software Codesign A Hardware/Software codesign problem is defined as follows.

Each point in space represents a specific loop instance. We use arrows between points (loop instances) in the graph to express data dependencies (ex Figure 1(a)). The extracted dependencies among loop instances are used to calculate sets of points that can be executed in parallel. Those sets of points are separated by hyperplanes [5]. The hyperplanes formed for the previous example are illustrated in Figure 1(b) as dashed lines. This paper considers the case where the for-loop has unitary dependencies among loop instances (grids).

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10th GAMM-IMACS International Symposium on Scientific Computing, Computer Arithmetic, and Validated Numerics by Alt R., Vignes J.

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